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Date: Fri, 25 Jan 2002 18:51:24 +0000 (GMT)
From: arjan@fenrus.demon.nl
To: alan@lxorguk.ukuu.org.uk (Alan Cox)
Subject: Re: [PATCH]: Fix MTRR handling on HT CPUs (improved)
cc: linux-kernel@vger.kernel.org
In-Reply-To: <E16UBUl-0003J9-00@the-village.bc.nu>
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In article <E16UBUl-0003J9-00@the-village.bc.nu> you wrote:
> As Dave pointed out I was mixing them

>> just not do it on the right CPU (you're _not_ supposed to read to see if
>> you are writing the same value: MTRR's can at least in theory have
>> side-effects, so it's not the same check as for the microcode update).

> So why not just set it twice - surely that is harmless ? Why add complex
> code ?

mtrr code does

"read value" -> store in variable
"set uncached"
<do lots of fiddling>
"write stored value"

on all cpus precisely in parallel.

Now... on HT the second half will store the value the first half just set to
uncached. and worse: it will RESTORE that into the final mtrr..

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