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Subject: Re: Athlon Optimization Problem
To: calin@ajvar.org (Calin A. Culianu)
Date: Mon, 28 Jan 2002 21:08:12 +0000 (GMT)
Cc: alan@lxorguk.ukuu.org.uk (Alan Cox),
        hassani@its.caltech.edu (Steven Hassani), linux-kernel@vger.kernel.org
In-Reply-To: <Pine.LNX.4.30.0201281551250.2376-100000@rtlab.med.cornell.edu> from "Calin A. Culianu" at Jan 28, 2002 03:53:48 PM
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From: Alan Cox <alan@lxorguk.ukuu.org.uk>
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> Hmm.  What do you recommend?  I remember seeing a spec sheet and register
> 0x95 was the memory write queue timer.. but I could have dreamed it..
> Anyone know what register 0x95 does?

It may well the case. All I know is that for some people at least leaving
0x95 as the bios set it up works and touching it does not - while for
the 0x55 case on older chips it all seems to be positive. VIA's own stuff
doesn't touch 0x95 - maybe there is a reason
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