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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Ingo Molnar <mingo@elte.hu>
Subject: Re: [PATCH 0/8] x86 dma_*_coherent rework patchset v2
Date: Wed, 20 Aug 2008 10:39:56 -0700
User-Agent: KMail/1.9.9
Cc: Joerg Roedel <joerg.roedel@amd.com>,
       FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>, mingo@redhat.com,
       tglx@linutronix.de, hpa@zytor.com, linux-kernel@vger.kernel.org,
       iommu@lists.linux-foundation.org, muli@il.ibm.com
References: <1219156366-32498-1-git-send-email-joerg.roedel@amd.com> <20080820094612.GA28492@elte.hu>
In-Reply-To: <20080820094612.GA28492@elte.hu>
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On Wednesday, August 20, 2008 2:46 am Ingo Molnar wrote:
> * Joerg Roedel <joerg.roedel@amd.com> wrote:
> > Hi,
> >
> > this patchset reworks the dma_*_coherent functions in the DMA layer
> > for the x86 architecture. The patch series extends the existing DMA
> > backends with missing *coherent callbacks and simplifies the generic
> > function to basically only call the registered backend. This allows
> > future optimizations in hardware specific IOMMU implementations. The
> > code ist tested on AMD64 with AMD IOMMU, GART, SWIOTLB and NOMMU as
> > well as on my old 486 box. Muli tested the Calgary specific patch.
> >
> > Joerg
> >
> > Changes since v1:
> >
> > - fixed wrong logic in the pci-nommu alloc_coherent code
> > - moved dma_*_coherent to include/asm-x86/dma-mapping.h
> >
> > git diff --stat tip/master.. :
> >
> >  arch/x86/kernel/amd_iommu.c      |    2 -
> >  arch/x86/kernel/pci-calgary_64.c |   14 ++++
> >  arch/x86/kernel/pci-dma.c        |  146
> > +------------------------------------- arch/x86/kernel/pci-gart_64.c    |
> >   35 +++++++++-
> >  arch/x86/kernel/pci-nommu.c      |   62 ++++++++++++++++
> >  include/asm-x86/dma-mapping.h    |   47 ++++++++++---
> >  6 files changed, 149 insertions(+), 157 deletions(-)
>
> applied to tip/x86/iommu - thanks Joerg!
>
> Jesse, Fujita-san, do these changes look fine to you?

Yeah, I'll let you push this time. :)

Signed-off-by:  Jesse Barnes <jbarnes@virtuousgeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center
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