Date: Wed, 22 Oct 2008 16:23:12 +0200
From: Ingo Molnar <mingo@elte.hu>
To: Cyrill Gorcunov <gorcunov@gmail.com>
Cc: Glauber Costa <glommer@gmail.com>, LKML <linux-kernel@vger.kernel.org>,
       "H. Peter Anvin" <hpa@zytor.com>, Thomas Gleixner <tglx@linutronix.de>,
       "Maciej W. Rozycki" <macro@linux-mips.org>,
       Max Kellermann <mk@cm4all.com>
Subject: Re: [PATCH -tip] x86: do_boot_cpu - check if we have ESR register
Message-ID: <20081022142312.GC26372@elte.hu>
References: <20081022140009.GA9639@localhost> <20081022141354.GA26372@elte.hu> <20081022141720.GB9639@localhost>
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* Cyrill Gorcunov <gorcunov@gmail.com> wrote:

> | > -		apic_write(APIC_ESR, 0);
> | > -		apic_read(APIC_ESR);
> | > +		if (APIC_INTEGRATED(apic_version[phys_apicid])) {
> | > +			apic_write(APIC_ESR, 0);
> | > +			apic_read(APIC_ESR);
> | > +		}
> | 
> | i'm wondering - is the server there really that old, that it has no 
> | integrated lapic? I.e. it's an i486 SMP box or so? Or perhaps some 
> | other, weird SMP box?
> | 
> | 	Ingo
> | 
> 
> I was quite wondering too -- it's Xeon server.
> 
> >From http://lkml.org/lkml/2008/10/20/34
> >> Hardware: Compaq P4 Xeon server, Broadcom CMIC-WS / CIOB-X2 board.
> >> Tell me if you need more detailed information.

ah, Compaq - how many CPUs does that box support? If it's 8 or more then 
perhaps they turned off the real local APIC, fudged some chipset glue to 
emulate APIC functionality and thus were able to use 8 or more of these 
chips? The built-in lapic would only go up to 4 CPUs. (or maybe even 
just up to dual, depending on the model)

This reminds us that all the is-integrated-lapic checks still matter 
today.

	Ingo
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