Subject: Re: 2.6.28-rc1: [drm:i915] *ERROR* ... Disabling tiling
From: Eric Anholt <eric@anholt.net>
To: Alan Jenkins <alan-jenkins@tuffmail.co.uk>
Cc: dri-devel@lists.sourceforge.net,
       Kernel Testers List <kernel-testers@vger.kernel.org>,
       linux-kernel <linux-kernel@vger.kernel.org>
In-Reply-To: <4905CFC3.1060907@tuffmail.co.uk>
References: <4905CFC3.1060907@tuffmail.co.uk>
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Date: Mon, 27 Oct 2008 11:00:22 -0700
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On Mon, 2008-10-27 at 14:27 +0000, Alan Jenkins wrote:
> What does this mean, should I do anything about it?  Is tiling nice to ha=
ve?
>=20
> It sounds like GEM broke something - though maybe it just added a more=20
> verbose error report.
>=20
> System: EeePC 701
> Kernel: v2.6.36-rc1-5-g23cf24c
> Chipset: Intel mobile 915G-something
> Regretably necessary kernel boot option: noapic
>=20
>=20
> [    1.438441] Linux agpgart interface v0.103
> [    1.438441] agpgart-intel 0000:00:00.0: Intel 915GM Chipset
> [    1.438441] agpgart-intel 0000:00:00.0: detected 7932K stolen memory
> [    1.443353] agpgart-intel 0000:00:00.0: AGP aperture is 256M @ 0xd0000=
000
> [    1.443353] [drm] Initialized drm 1.1.0 20060810
> [    1.443353] pci 0000:00:02.0: PCI INT A -> Link[LNKA] -> GSI 5=20
> (level, low) -> IRQ 5
> [    1.443353] pci 0000:00:02.0: setting latency timer to 64
> [    1.443353] [drm:i915_gem_detect_bit_6_swizzle] *ERROR* Couldn't read=20
> from MCHBAR.  Disabling
> tiling.

This means that something went wrong with our detection of the
CPU-versus-GPU tiling swizzling mode, and object tiling under GEM will
be disabled as a result.  I should get access to an eee 7xx on Thursday
to see what's up with it -- it's supposed to be just a normal 915gm as
far as I know.

> [    1.443353] [drm:i915_driver_load]o  *ERROR* failed to enable MSI

Looks like we emit the error message even if your chipset doesn't
support MSI.  That's a mistake, I'll get it cleaned up.

(MSI didn't actually get supported for integrated graphics until the
G965 for the desktop and GM45 for mobile, though it got supported for
ethernet and PEG earlier than that)

--=20
Eric Anholt
eric@anholt.net                         eric.anholt@intel.com


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