Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757834AbZAMBsR (ORCPT ); Mon, 12 Jan 2009 20:48:17 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753968AbZAMBr7 (ORCPT ); Mon, 12 Jan 2009 20:47:59 -0500 Received: from mx3.mail.elte.hu ([157.181.1.138]:40315 "EHLO mx3.mail.elte.hu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753772AbZAMBr6 (ORCPT ); Mon, 12 Jan 2009 20:47:58 -0500 Date: Tue, 13 Jan 2009 02:47:23 +0100 From: Ingo Molnar To: Jon Masters Cc: "Eric W. Biederman" , Bjorn Helgaas , Stefan Assmann , Len Brown , Jesse Barnes , Olaf Dabrunz , Thomas Gleixner , Steven Rostedt , Linux Kernel Mailing List , linux-acpi@vger.kernel.org, Sven Dietrich , "Maciej W. Rozycki" Subject: Re: PCI, ACPI, IRQ, IOAPIC: reroute PCI interrupt to legacy boot interrupt equivalent Message-ID: <20090113014723.GA11366@elte.hu> References: <496B24E5.1070804@suse.de> <200901121151.53195.bjorn.helgaas@hp.com> <1231806563.4094.25.camel@perihelion.bos.jonmasters.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1231806563.4094.25.camel@perihelion.bos.jonmasters.org> User-Agent: Mutt/1.5.18 (2008-05-17) X-ELTE-VirusStatus: clean X-ELTE-SpamScore: -1.5 X-ELTE-SpamLevel: X-ELTE-SpamCheck: no X-ELTE-SpamVersion: ELTE 2.0 X-ELTE-SpamCheck-Details: score=-1.5 required=5.9 tests=BAYES_00 autolearn=no SpamAssassin version=3.2.3 -1.5 BAYES_00 BODY: Bayesian spam probability is 0 to 1% [score: 0.0000] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1291 Lines: 30 * Jon Masters wrote: > On Mon, 2009-01-12 at 15:36 -0800, Eric W. Biederman wrote: > > > This hardware behavior is not specific to boot interrupts or Intel. > > It's not specific to Intel, but it is a specific compatibility behavior. > > > Is this case really so interesting and compelling that we want to > > fight through and figure what we need to do to make this work reliably > > on every x86 chipset? > > How else do you propose implementing IRQ handling in e.g. the RT kernel? > We get a hardware interrupt, we can't FastEOI, we can't process > synchronously, we can't do all of those things you might expect. > Implementing RT requires that we delay handling of the IRQ until > arbitrarily later in the future when we get around to it. a number of mainline drivers also mask/unmask irqs from within the IRQ handler. It's not particularly smart in a native driver, but can happen - and if we get an active line after that point (and this can happen because the driver is active), we are in trouble. Ingo -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/