From: "Rafael J. Wysocki" <rjw@sisk.pl>
To: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Subject: Re: [PATCH 5/8] PCI PCIe portdrv: Fix allocation of interrupts
Date: Tue, 13 Jan 2009 12:17:06 +0100
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Cc: Jesse Barnes <jbarnes@virtuousgeek.org>,
       Linux PCI <linux-pci@vger.kernel.org>,
       LKML <linux-kernel@vger.kernel.org>
References: <200901042346.42723.rjw@sisk.pl> <200901100038.56748.rjw@sisk.pl> <496C00CD.3070302@jp.fujitsu.com>
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On Tuesday 13 January 2009, Kenji Kaneshige wrote:
> Rafael J. Wysocki wrote:
> > On Saturday 10 January 2009, Jesse Barnes wrote:
> >> On Thursday, January 8, 2009 12:45 pm Rafael J. Wysocki wrote:
> >>> On Thursday 08 January 2009, Rafael J. Wysocki wrote:
> >>>> On Thursday 08 January 2009, Kenji Kaneshige wrote:
> >>>>> Rafael J. Wysocki wrote:
> >>>>>> On Thursday 08 January 2009, Kenji Kaneshige wrote:
> >>>>>>> Rafael J. Wysocki wrote:
> >>>>>>>> From: Rafael J. Wysocki <rjw@sisk.pl>
> >>>>>>>>
> >>>>>>>> If MSI-X interrupt mode is used by the PCI Express port driver, too
> >>>>>>>> many vectors are allocated and it is not ensured that the right
> >>>>>>>> vectors will be used for various services.  Namely, the PCI Express
> >>>>>>>> specification states that both PCI Express native PME and PCI
> >>>>>>>> Express hotplug will always use the same MSI or MSI-X message for
> >>>>>>>> signalling interrupts, which implies that the same vector will be
> >>>>>>>> used by both of them.  Also, the VC service does not use interrupts
> >>>>>>>> at all. Moreover, is not clear which of the vectors allocated by
> >>>>>>>> pci_enable_msix() will be used for PME and hotplug and which of
> >>>>>>>> them will be used for AER if all of these services are configured.
> >>>>>>>>
> >>>>>>>> For these reasons, rework the allocation of interrupts for PCI
> >>>>>>>> Express ports so that at most two vectors are allocated and ensure
> >>>>>>>> that the right vector will be used for the right purpose.
> >>> Appended is a cleaned-up version of the patch that also contains comments
> >>> with references to the appropriate sections of the PCI Express spec.
> >> We'll need testing here in any case; I'll have to re-read the specs carefully 
> >> to see if we can really rely on the vector numbers you have here (at first 
> >> glance Kenji-san's approach seems more robust).
> > 
> > It has a catch too.  Namely, is there any warranty that we'll get the same
> > vectors when the second pci_enable_msix() is called and that they will be in
> > the same order?
> > 
> 
> In my understanding, the following description of Interrupt Message
> Number in the PCI Express spec explains this.
> 
> "[...] For a given MSI-X implementation, the entry must remain constant. [...]"

The entry - yes, but the associated interrupt vector as sent to the CPU?  That
seems to be platform-dependent.

Anyway, I'm going to send an updated patch shortly.

Thanks,
Rafael
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