Message-ID: <496EE7ED.10408@jp.fujitsu.com>
Date: Thu, 15 Jan 2009 16:38:21 +0900
From: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
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To: "Rafael J. Wysocki" <rjw@sisk.pl>
CC: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>,
       Jesse Barnes <jbarnes@virtuousgeek.org>,
       Linux PCI <linux-pci@vger.kernel.org>,
       LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 5/8] PCI PCIe portdrv: Fix allocation of interrupts
References: <200901042346.42723.rjw@sisk.pl> <496D815E.8010107@jp.fujitsu.com> <200901141135.31165.rjw@sisk.pl> <200901141157.32720.rjw@sisk.pl>
In-Reply-To: <200901141157.32720.rjw@sisk.pl>
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Rafael J. Wysocki wrote:
> On Wednesday 14 January 2009, Rafael J. Wysocki wrote:
>> On Wednesday 14 January 2009, Kenji Kaneshige wrote:
> [...]
>>> I'm sorry but I don't understand what the problem is.
>>> Do you mean pci_disable_msix() doesn't work on some platforms?
>> No, I don't.  It was just confusion on my side, sorry.
>>
>> Please have a look at the new version of the patch I sent yesterday
>> (http://marc.info/?l=linux-pci&m=123185510828181&w=4).
> 
> BTW, in your patch the first dummy pci_enable_msix() allocates just one
> vector, which means that the contents of both
> msix_entries[idx_hppme].entry and msix_entries[idx_aer].entry will be the same,
> if my reading of the spec (PCI 3.0 in this case) is correct.

According to PCI 3.0 implementation note "Handling MSI-X Vector Shortage,"
it seems your reading is not correct.

Assume that the port have 4 entries([0-3]) in MSI-X table, and that entry[2]
for hotplug/PME and entry[3] for AER, and that kernel only allocates 2 vector.
Spec says that the port could be designed for software to configure entries
assigning vectors{A,B} to multiple entries as ABAB, AABB, ABBB etc. 

So if there is just one vector, it could be AAAA.

Thanks,
H.Seto

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