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Date: Wed, 29 Nov 2000 22:52:10 -0600
From: Damacus Porteng <kernel@bastion.yi.org>
To: Andre Hedrick <andre@linux-ide.org>
Cc: Linux Kernel <linux-kernel@vger.kernel.org>
Subject: Re: IDE-SCSI/HPT366 Problem
In-Reply-To: <20001129191402.F5891@garloff.etpnet.phys.tue.nl> <Pine.LNX.4.10.10011291025411.1743-100000@master.linux-ide.org>
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In-Reply-To: <Pine.LNX.4.10.10011291025411.1743-100000@master.linux-ide.org>; from Andre Hedrick on Wed, Nov 29, 2000 at 10:27:17AM -0800
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Andre:

Is that to say that I'd experience this problem with any EIDE CDRW used on one
of the HPT366 channels, or is it to say that only several CDRWs aren't
supported under this chipset?

Also, in regards to Kurt, I wasn't running the CDRW on the same channel as the
source.

Intel PIIX4		HPT366
-----------		------
/dev/hda (CDRW, worked)	/dev/hde (boot: 36.5G)
/dev/hdb		/dev/hdf (storage: 61.4G)
/dev/hdc		/dev/hdg (CDRW, failed)
/dev/hdd		/dev/hdh

In the crashing setup, the boot drive was /dev/hde, source drive was /dev/hdf.
CDRW was /dev/hdg (Second channel, master.)  In the working setup, boot and
source were the same, CDRW was moved to hda.

Regards,

Damacus Porteng

On Wed, Nov 29, 2000 at 10:27:17AM -0800, Andre Hedrick wrote:
> On Wed, 29 Nov 2000, Kurt Garloff wrote:
> 
> > Strange. If you read data from the harddisk on an IDE channel and write it
> > (with cdrecord) to some CDRW on the same IDE channel, you have to expect
> > trouble: As with IDE there is no disconnect from the bus (as opposed to
> > SCSI), you risk buffer underruns. 
> > A lockup however is not to be expected :-(
> 
> It is completely expected bacause of teh active timing changes done on
> this chipset design.  The timings are for ATA DMA and not ATAPI.
> You should expect a 100% hardlock on mistimed IO access.
> 
> Cheers,
> 
> Andre Hedrick
> CTO Timpanogas Research Group
> EVP Linux Development, TRG
> Linux ATA Development
> 
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-- 
Damnit, Linus, I'm a network admin, not a kernel hacker!
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