Date: Sun, 8 Mar 2009 12:04:37 +0100
From: Ingo Molnar <mingo@elte.hu>
To: Yinghai Lu <yinghai@kernel.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>, Jesse Barnes <jbarnes@virtuousgeek.org>,
       Matthew Wilcox <matthew@wil.cx>,
       Andrew Morton <akpm@linux-foundation.org>,
       Thomas Gleixner <tglx@linutronix.de>,
       "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
       linux-pci@vger.kernel.org
Subject: Re: [PATCH] x86/pci: try to detect host_bridge pci_cfg_space
Message-ID: <20090308110437.GA27811@elte.hu>
References: <49B1C50E.5010209@kernel.org> <49B1C69F.70904@zytor.com> <49B1C81B.5010904@zytor.com> <49B1C8C1.4090304@kernel.org>
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* Yinghai Lu <yinghai@kernel.org> wrote:

> H. Peter Anvin wrote:
> > H. Peter Anvin wrote:
> >> Yinghai Lu wrote:
> >>> Impact: get correct pci_cfg_size for host_bridge
> >>>
> >>> more host bridges support 4k cfg, so check them directly
> >>> instead of quirks.
> >>>
> >>> Signed-off-by: Yinghai Lu <yinghai@kernel.org>
> >>
> >> I'm utterly confused by this.  This is basically saying we should try
> >> to probe for an extended device space for every host bridge. 
> >> Logically speaking, this is valid: if there is a valid path by which
> >> we can probe for byte 256 then it should succeed.
> >>
> >> HOWEVER, the same argument applies for *every single device*.  So if
> >> this does indeed work, why should we limit it to host bridges?
> >>
> > 
> > Looking at the code (as opposed to just the patch) made it a bit
> > clearer.  The argument you're making here is that only host bridges are
> > known to have extended address space without also having a PCI-X
> > extension header, right?
> 
>  
> Yes.

This too should go into the v2 patch description. 

I'd also suggest to flip around the subject line from x86/pci to 
pci/x86 - it's more of a PCI patch than a pure x86 patch. The 
same problem could affect other platforms too i suspect.

	Ingo
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