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From: David Brownell <david-b@pacbell.net>
To: Wolfgang =?iso-8859-1?q?M=FCes?= <wolfgang.mues@auerswald.de>
Subject: Re: [PATCH 7/7] mmc_spi: support for non-byte-aligned cards
Date: Wed, 11 Mar 2009 13:03:53 -0800
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Cc: "Will Newton" <will.newton@gmail.com>, "Pierre Ossman" <drzeus@drzeus.cx>,
       "Andrew Morton" <akpm@linux-foundation.org>,
       "Matt Fleming" <matt@console-pimps.org>,
       "Mike Frysinger" <vapier.adi@gmail.com>, linux-kernel@vger.kernel.org
References: <87a5b0800903110656x7000e0c8q23ceae7e87483bf7@mail.gmail.com> <200903111534.34340.wolfgang.mues@auerswald.de>
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On Wednesday 11 March 2009, Wolfgang M?es wrote:
> The SD protocoll ist NOT byte-aligned. Messages are starting with a 
> leading "0" bit. I think some chip vendors have adapted the SPI mode
> from SD mode and forgotten to do propper byte alignment. 

Please capture that information in comments somewhere, so the
next folk updating the driver won't have to be guessing as much
about the low-level protocol bugs that are being coped with.

Comments listing concrete examples of such cards (or even
just a compatibility list posted to an archived mailing
list so a websearch can find it) would be nice too.  Who
knows, maybe the vendors would even fix the next rev of
their silicon (or firmware, whatever).  ;)


> Am Mittwoch, 11. M?rz 2009 schrieb Will Newton:
> > I have not seen these problems or seen them reported by others.
>
> Yes, it is hard to believe that such a design error is present in today SD
> cards. But spi mode is used only by some devices which do not have a SD
> host controller on board.

I think that's it exactly.  Some of the newer MMC-derived
specifications even desupported SPI mode, as I recall.

In practice, I can't see it going away for a very long time,
but mid- and high-end systems tend to have real MMC/SD/SDIO
controllers they use for media cards as well as eMMC and
other "managed NAND" solutions (iNAND etc); and presumably
CE-ATA isn't entirely a paper tiger.

- Dave


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