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Date: Sun, 24 Feb 2002 22:42:46 +0100
From: Vojtech Pavlik <vojtech@suse.cz>
To: Rik van Riel <riel@conectiva.com.br>
Cc: nick@snowman.net, Alan Cox <alan@lxorguk.ukuu.org.uk>,
        Martin Dalecki <dalecki@evision-ventures.com>,
        Troy Benjegerdes <hozer@drgw.net>,
        Linus Torvalds <torvalds@transmeta.com>,
        Andre Hedrick <andre@linuxdiskcert.org>,
        Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: Flash Back -- kernel 2.1.111
Message-ID: <20020224224246.C1949@ucw.cz>
In-Reply-To: <Pine.LNX.4.21.0202241624330.10803-100000@ns> <Pine.LNX.4.33L.0202241831330.7820-100000@imladris.surriel.com>
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In-Reply-To: <Pine.LNX.4.33L.0202241831330.7820-100000@imladris.surriel.com>; from riel@conectiva.com.br on Sun, Feb 24, 2002 at 06:32:09PM -0300
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On Sun, Feb 24, 2002 at 06:32:09PM -0300, Rik van Riel wrote:
> On Sun, 24 Feb 2002 nick@snowman.net wrote:
> 
> > None of the chipsets that supported VLB had more than one buss.  What
> > I don't know is some idiot may have built a VLB-VLB bridge, but I
> > doubt it.
> 
> There are PCI-VLB bridges.  Though it's unlikely, it may be
> possible that there are systems with multiple such bridges
> around... ;)

Uhh? I thought most the PCI & VLB systems had the PCI hanging off the
VLB and not the other way around. At least those I've seen had it this
way.

-- 
Vojtech Pavlik
SuSE Labs
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