Subject: RE: PAGE_CACHE_WC strikes again
From: Suresh Siddha <suresh.b.siddha@intel.com>
Reply-To: suresh.b.siddha@intel.com
To: "Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>, Eric Anholt <eric@anholt.net>,
       lkml <linux-kernel@vger.kernel.org>
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Organization: Intel Corp
Date: Tue, 31 Mar 2009 17:03:10 -0800
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On Tue, 2009-03-31 at 17:29 -0700, Pallipadi, Venkatesh wrote:
> The key point here is 
> 
> > setting PAGE_CACHE_WC disables the WC effect of the
> > MTRR on my non-PAT (disabled due to CPU errata)
> 
> When PAT is disabled, the default setting in PAT MSR is
> 00 - WB
> 01 - WT
> 10 - UC_MINUS
> 11 - UC
> 
> There is no way to set WC with PAT. By hardcoding _PAGE_CACHE_WC
> (which is 01) the driver is basically selecting write-through!
> 
> And when MTRR says WC and PAT says WT, effective type is UC.
> 
> Basically, no one should be hard-coding the memory type. Please use
> pgprot_writecombine() which does the right thing by using WC
> (when PAT is enabled) or UC_MINUS (when PAT is disabled).

And the driver should use right API to track the underlying page frame
thats getting mapped by this vma, with the corresponding attribute.
API's like remap_pfn_range(), vm_insert_pfn() will setup the PTE's
aswell as track the pfn's attributes.

API's like set_memory_uc/wc() will explicitly setup the page attributes.

Jesse, As far as I see, the drm GEM fault handler routines don't seem to
do any of this. Am I missing something? We need to fix this so that we
can avoid potential aliasing issues.

thanks,
suresh


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