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From: David Brownell <david-b@pacbell.net>
To: Thomas Gleixner <tglx@linutronix.de>,
       "Narnakaje, Snehaprabha" <nsnehaprabha@ti.com>
Subject: Re: [PATCH] MTD-NAND: Changes to read_page APIs to support NAND_ECC_HW_SYNDROME mode on TI DaVinci DM355
Date: Tue, 7 Apr 2009 16:08:18 -0700
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On Tuesday 07 April 2009, Thomas Gleixner wrote:
> What you need is a NAND_ECC_HW_OOB_FIRST mode, which uses the
> NAND_ECC_HW write function and implements a separate read function
> which reads the oob and then reads the data chunks.

That sounds about right, and it should address the issues
I raised earlier in this thread.

Though I might name it differently.  Reason being that the
"read OOB first" bit is only needed when there's more than
one ecc.step ... small page chips won't need it.  Maybe it
would suffice to map that mode to ECC_HW in those cases.

- Dave
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