Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755294AbZDNVvh (ORCPT ); Tue, 14 Apr 2009 17:51:37 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755100AbZDNVv0 (ORCPT ); Tue, 14 Apr 2009 17:51:26 -0400 Received: from ovro.ovro.caltech.edu ([192.100.16.2]:44284 "EHLO ovro.ovro.caltech.edu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755184AbZDNVvY (ORCPT ); Tue, 14 Apr 2009 17:51:24 -0400 X-Greylist: delayed 1675 seconds by postgrey-1.27 at vger.kernel.org; Tue, 14 Apr 2009 17:51:24 EDT Message-ID: <49E4FED0.1020003@ovro.caltech.edu> Date: Tue, 14 Apr 2009 14:23:28 -0700 From: David Hawkins User-Agent: Thunderbird 2.0.0.21 (Windows/20090302) MIME-Version: 1.0 To: Grant Likely CC: Ira Snyder , Arnd Bergmann , Jan-Bernd Themann , netdev@vger.kernel.org, Rusty Russell , linux-kernel@vger.kernel.org, linuxppc-dev@ozlabs.org Subject: Re: [RFC v2] virtio: add virtio-over-PCI driver References: <20090224000002.GA578@ovro.caltech.edu> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.0 (ovro.ovro.caltech.edu); Tue, 14 Apr 2009 14:23:27 -0700 (PDT) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1558 Lines: 39 Hi Grant, > I like this a lot. I need to do much the same thing on one of my > platforms, so I'm going to use your patch as my starting point. Have > you made many changes since you posted this version of your patch? > I'd like to collaborate on the development and help to get it > mainlined. > > In my case I've got an MPC5200 as the 'host' and a Xilinx Virtex > (ppc440) as the 'client'. I intend set aside a region of the Xilinx > Virtex's memory space for the shared queues. I'm starting work on it > now, and I'll provide you with feedback and/or patches as I make > progress. I'll let Ira update you on the patch status. If you want someone to chat about the hardware-level interaction, feel free to chat off-list - assuming of course that no one wants to hear us talk hardware :) I selected the MPC8349EA in-part due to its PCI mailboxes, so that we could implement this type of driver (an interlocked handshake for flow control of data transfers). The previous chip I'd used was a PLX PCI9054 Master/Target, and it has similar registers. I'm not sure if the Xilinx PCI core, or whatever PCI core you are using, already has something like the mailboxes implemented, but if not, it won't take much to code up some logic. I prefer VHDL myself, but can speak Verilog if forced to :) Cheers, Dave -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/