Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759531AbZD1BtW (ORCPT ); Mon, 27 Apr 2009 21:49:22 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1756980AbZD1BtJ (ORCPT ); Mon, 27 Apr 2009 21:49:09 -0400 Received: from az33egw02.freescale.net ([192.88.158.103]:56607 "EHLO az33egw02.freescale.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755111AbZD1BtH convert rfc822-to-8bit (ORCPT ); Mon, 27 Apr 2009 21:49:07 -0400 X-MimeOLE: Produced By Microsoft Exchange V6.5 Content-class: urn:content-classes:message MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 8BIT Subject: RE: [PATCH] fsldma: use PCI Read Multiple command Date: Tue, 28 Apr 2009 09:48:58 +0800 Message-ID: In-Reply-To: <49F608B7.9080409@ovro.caltech.edu> X-MS-Has-Attach: X-MS-TNEF-Correlator: Thread-Topic: [PATCH] fsldma: use PCI Read Multiple command Thread-Index: AcnHb0Tk8Z1RdEKzT6q9dGfnC8niAgAMwnbw References: <20090424183517.GB23140@ovro.caltech.edu> <49F608B7.9080409@ovro.caltech.edu> From: "Liu Dave-R63238" To: "David Hawkins" , "Tabi Timur-B04825" Cc: "Ira Snyder" , , , "Dan Williams" , "Zhang Wei" X-Brightmail-Tracker: AAAAAQAAAWE= X-Brightmail-Tracker: AAAAAQAAAWE= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1612 Lines: 43 > Here's a few results from DMA tests between two > MPC8349EA boards housed in a CPCI chassis. > > 1. DMA mode register (DMAMRn) > PCI read command (PRC, bits 11:10) > > a) DMAMRn[PRC] = 00 = PCI Read > > The PCI read command is 6h on the PCI bus. > For DMA lengths of less than 1 cache line (32-bytes) > the DMA controller will generate a PCI 6h command. > However, for lengths of 32-bytes and higher, the > DMA controller actually generates a PCI Read Line (Eh) > command. > > Freescale indicated that this 'change of PCI command code' > functionality is an undocumented 'feature', there to > improve performance for longer read lengths. > > b) DMAMRn[PRC] = 01 = PCI Read Line > > Generated the PCI command code for PCI read line (Eh), > regardless of DMA length. > > c) DMAMRn[PRC] = 10 = PCI Read Multiple > > Generated the PCI command code for PCI Read Multiple (Ch), > regardless of DMA length. Good summary! For the DMA PCI read/line/multi-line is outbound transaction. So according to your experiment, the 8349 PCI controller(as master) attemp to streaming/combining the outbound transaction(treated as prefetchable space). IIRC, the early 8349EUM has the bit[2]-SE in the POCMRn register, and is removed now. Not sure if it does function. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/