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From: David Brownell <david-b@pacbell.net>
To: Thierry Reding <thierry.reding@avionic-design.de>
Subject: Re: [spi-devel-general] [PATCH v2] spi: Add support for the OpenCores SPI controller.
Date: Tue, 28 Apr 2009 04:58:22 -0700
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Cc: spi-devel-general@lists.sourceforge.net, linux-kernel@vger.kernel.org
References: <200904041227.54687.david-b@pacbell.net> <1240916464-4187-1-git-send-email-thierry.reding@avionic-design.de> <20090428111532.GA14422@avionic-design.de>
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On Tuesday 28 April 2009, Thierry Reding wrote:
> This second version is pretty much a rewrite.

That happens sometimes...


> Some notes about the most 
> important changes:
> 
> ? * uses per-chip states to allow more slaves to use the controller
> ? ? concurrently
> ? * rejects invalid device configurations during setup
> ? * rejects invalid per-message and per-transfer options
> ? * queues messages so that they can be processed one after another
> ? ? ? - this also provides for a way to handle power-management
> ? * omits the spioc.h (and with it the platform data structure):
> ? ? ? - uses the platform_device.id for the bus number
> ? ? ? - always uses 8 chipselects because that's the maximum that the core
> ? ? ? ? supports

All that sounds good.

 
> I couldn't really find a way to implement per-transfer overrides for the
> word size because the controller simply has no concept of word sizes. Is it
> in such cases still necessary to hardwire the word size to 8 bits?

Is this the http://www.opencores.org/?do=project&who=spi core?
Its summary says "Variable length of transfer word up to 32 bits";
does that mean "configurable when core is synthesized" instead of
truly "variable"?
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