Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1763628AbZD3QVW (ORCPT ); Thu, 30 Apr 2009 12:21:22 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753753AbZD3QVJ (ORCPT ); Thu, 30 Apr 2009 12:21:09 -0400 Received: from smtp.ultrahosting.com ([74.213.174.254]:46218 "EHLO smtp.ultrahosting.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753137AbZD3QVI (ORCPT ); Thu, 30 Apr 2009 12:21:08 -0400 Date: Thu, 30 Apr 2009 12:11:26 -0400 (EDT) From: Christoph Lameter X-X-Sender: cl@qirst.com To: Ingo Molnar cc: Mathieu Desnoyers , Linus Torvalds , Andrew Morton , Nick Piggin , KOSAKI Motohiro , Peter Zijlstra , thomas.pi@arcor.dea, Yuriy Lalym , Linux Kernel Mailing List , ltt-dev@lists.casi.polymtl.ca, Tejun Heo Subject: Re: [PATCH] Fix dirty page accounting in redirty_page_for_writepage() In-Reply-To: <20090430160606.GA5913@elte.hu> Message-ID: References: <20090430133859.GB8329@elte.hu> <20090430141446.GD14696@elte.hu> <20090430143819.GF14696@elte.hu> <20090430150142.GC20580@elte.hu> <20090430154255.GA3714@elte.hu> <20090430160606.GA5913@elte.hu> User-Agent: Alpine 1.10 (DEB 962 2008-03-14) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1344 Lines: 29 On Thu, 30 Apr 2009, Ingo Molnar wrote: > > may not care too much about a event counter missing a beat once in > > a while for platforms not supporting atomic per cpu ops. I know > > this affects IA64. The cost of an atomic operations for an event > > counter update (which would have avoided the potential of a > > concurrent update) was not justifiable. > > when you say "atomics", do you mean the classic meaning of atomics? > Because there are no classic atomics involved. This is the > before/after disassembly from Eric's commit 4e69489a0: The fallback for IA64 would be to use full (classic) atomic operations (fetchadd) instead of fast atomic vs. interrupt as available on x86 > c0436275: 64 83 05 20 5f 6a c0 addl $0x1,%fs:0xc06a5f20 > > There's no atomic instructions at all - the counters here are only > accessed locally. They are local-irq-atomic, but not > cacheline-atomic. Right but that is not available on IA64. So one must choose between manually disabling interrupts and then increment the counter (long code sequence) and a classic atomic operation for the fallback. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/