From: "Michael S. Zick" <lkml@morethan.org>
Reply-To: lkml@morethan.org
To: Andi Kleen <andi@firstfloor.org>
Subject: Re: Linux 2.6.30-rc8 [also: VIA Support]
Date: Thu, 4 Jun 2009 15:29:41 -0500
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Cc: Harald Welte <HaraldWelte@viatech.com>,
       Linus Torvalds <torvalds@linux-foundation.org>,
       Duane Griffin <duaneg@dghda.com>,
       Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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On Thu June 4 2009, Andi Kleen wrote:
> Harald Welte <HaraldWelte@viatech.com> writes:
> >
> > why would it matter on UP? as indicated, I'm not the expert here, but I thought
> > memory ordering issues only arise in SMP systems [or possibly with regard to
> > DMA, but as we already explored much earlier in this thread, drivers that access
> > DMA buffers whil the hardware owns them are buggy and need to be fixed]
> 
> Sorry we didn't establish that. Accessing data structures that are
> also accessed by DMA hardware is pretty common in fact and memory
> ordering issues also come up regularly (e.g. all the infamous PCI
> posting bugs)
> 
> What we established is that the drivers don't use LOCK for it
> (or at least we think that's very unlikely)
>

It was a real headache in the pa-risc port - -
Even went so far as to build some experimental kernels where all
the spin-lock structures where in a separate loader section.

That was to avoid in-direct interference - I.E: Both DMA and
the processor handling the locking **both** invalidating the
same cache line at the same time (only one can win).

Things might get that deep with this processor/chip-set combination;
but pa-risc has some very unusual hardware in some older models.

My favorite still is a human coding error somewhere, not an
architectural or structural problem.

Mike 
> -Andi
> 


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