Date: Wed, 10 Jun 2009 13:02:44 +0200
From: Ingo Molnar <mingo@elte.hu>
To: "H. Peter Anvin" <hpa@kernel.org>
Cc: Harald Welte <HaraldWelte@viatech.com>,
       Jaswinder Singh Rajput <jaswinder@kernel.org>,
       linux-kernel@vger.kernel.org, tglx@linutronix.de
Subject: Re: [PATCH] X86: cpu_debug support for VIA / Centaur CPU's
Message-ID: <20090610110244.GE27724@elte.hu>
References: <20090609082931.GD25316@prithivi.gnumonks.org> <1244537598.2558.9.camel@ht.satnam> <20090609145305.GD3986@prithivi.gnumonks.org> <20090609151557.GA9362@elte.hu> <4A2F353A.9040007@kernel.org>
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* H. Peter Anvin <hpa@kernel.org> wrote:

> Ingo Molnar wrote:
> > 
> > MSRs should really be enumerated along CPU features. They will be 
> > accessed if a CPU offers that CPU feature.
> > 
> 
> Nice in theory, but so many MSRs have to be enumerated with obscure test
> combinations, that it really isn't practical in the general case.  That
> is why we have the safe MSR variants.
> 
> > 
> > Yeah, the safe read should never fault - there should be all 
> > zeroes or an error return.
> > 
> 
> Error return, MSRs #GP if not present.  All zero means a present 
> MSR (which is zero.)

yes, of course - i meant the /debug/x86/cpu/* behavior: it should 
either result zeroes, or should return -EINVAL. (probably the 
latter)

	Ingo
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