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Date: Tue, 23 Jun 2009 10:40:45 +0200
Message-ID: <7c86c4470906230140p35ce043fw24e0c20651568f31@mail.gmail.com>
Subject: Re: perf_counter Atom patch
From: stephane eranian <eranian@googlemail.com>
To: Yong Wang <yong.y.wang@linux.intel.com>
Cc: "Wang, Yong Y" <yong.y.wang@intel.com>, Ingo Molnar <mingo@elte.hu>,
       Peter Zijlstra <a.p.zijlstra@chello.nl>,
       LKML <linux-kernel@vger.kernel.org>, Paul Mackerras <paulus@samba.org>,
       Andi Kleen <andi@firstfloor.org>
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Yong,

On Tue, Jun 23, 2009 at 10:27 AM, stephane
eranian<eranian@googlemail.com> wrote:
> Hi,
>
> On Tue, Jun 23, 2009 at 9:59 AM, Yong Wang<yong.y.wang@linux.intel.com> wrote:
>> On Tue, Jun 23, 2009 at 09:45:03AM +0200, stephane eranian wrote:
>>>
>>> Unfortunately, I don't have a N270 to compare with your results.
>>> We need to verify whether or not N270 implements the fixed counters.
>>> Does it report architected perfmon v3 or v1?
>>>
>>
>> All Atom processors report perfmon v3 as specified in SDM. N270 is no
>> exception.
>>
> V3 does not set a minimal number of fixed counters, could be zero. But
> that seems
> odd. Let me ask around.
>
Second thought on this:
       x86_pmu.num_counters_fixed      =
max((int)edx.split.num_counters_fixed, 3);

        rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);


Forcing num_counter_fixed is not enough, you need to make sure they are actually
activated in GLOBAL_CTRL, i.e., make sure bits 32-34 are set in intel_ctrl.
Depending on which machine you're on, the power on value for GLOBAL_CTRL
changes. The correct value for it should be that ONLY generic counters are on
by default.
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