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Date: Thu, 25 Jun 2009 12:39:23 +0200
Message-ID: <7c86c4470906250339k4a168611vfe206c599d098489@mail.gmail.com>
Subject: Re: perf_counter Atom patch
From: stephane eranian <eranian@googlemail.com>
To: Ingo Molnar <mingo@elte.hu>
Cc: Yong Wang <yong.y.wang@linux.intel.com>,
       "Wang, Yong Y" <yong.y.wang@intel.com>,
       Peter Zijlstra <a.p.zijlstra@chello.nl>,
       LKML <linux-kernel@vger.kernel.org>, Paul Mackerras <paulus@samba.org>,
       Andi Kleen <andi@firstfloor.org>
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On Wed, Jun 24, 2009 at 10:52 AM, Ingo Molnar<mingo@elte.hu> wrote:
>
> * Yong Wang <yong.y.wang@linux.intel.com> wrote:
>
>> On Tue, Jun 23, 2009 at 11:47:17AM +0200, Ingo Molnar wrote:
>> >
>> > * Yong Wang <yong.y.wang@linux.intel.com> wrote:
>> >
>> > > On Tue, Jun 23, 2009 at 10:40:45AM +0200, stephane eranian wrote:
>> > > > Yong,
>> > > >
>> > > > On Tue, Jun 23, 2009 at 10:27 AM, stephane
>> > > > eranian<eranian@googlemail.com> wrote:
>> > > > > Hi,
>> > > > >
>> > > > > On Tue, Jun 23, 2009 at 9:59 AM, Yong Wang<yong.y.wang@linux.intel.com> wrote:
>> > > > >> On Tue, Jun 23, 2009 at 09:45:03AM +0200, stephane eranian wrote:
>> > > > >>>
>> > > > >>> Unfortunately, I don't have a N270 to compare with your results.
>> > > > >>> We need to verify whether or not N270 implements the fixed counters.
>> > > > >>> Does it report architected perfmon v3 or v1?
>> > > > >>>
>> > > > >>
>> > > > >> All Atom processors report perfmon v3 as specified in SDM. N270 is no
>> > > > >> exception.
>> > > > >>
>> > > > > V3 does not set a minimal number of fixed counters, could be zero. But
>> > > > > that seems
>> > > > > odd. Let me ask around.
>> > > > >
>> > > > Second thought on this:
>> > > >        x86_pmu.num_counters_fixed      =
>> > > > max((int)edx.split.num_counters_fixed, 3);
>> > > >
>> > > >         rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl);
>> > > >
>> > > >
>> > > > Forcing num_counter_fixed is not enough, you need to make sure
>> > > > they are actually activated in GLOBAL_CTRL, i.e., make sure bits
>> > > > 32-34 are set in intel_ctrl. Depending on which machine you're
>> > > > on, the power on value for GLOBAL_CTRL changes. The correct
>> > > > value for it should be that ONLY generic counters are on by
>> > > > default.
>> > > >
>> > >
>> > > Oh, this might be why fixed counter do not work on my Atom box. I
>> > > will look into it. [...]
>> >
>> > Thanks - having a different bootup default for the global ctrl
>> > indeed sounds like a good and plausible explanation - please send a
>> > patch for that if you've tested it, removing that quirk and adding
>> > the global-enable ctrl logic.
>> >
>>
>> The root cause of fixed counters not working on Atom is indeed
>> related to global counter control MSR. The power-on value on Atom
>> is 0x3 which means only general purpose counters are enabled by
>> default. The power-on value on Core2 is 0xffffffffffffffff which I
>> believe is also the case for Nehalem. That's why Core2 and Nehalem
>> do not have the problem.
>
> I suspect it can also be firmware/BIOS and microcode version
> dependent - it's better to not rely on bootup state like that
> indeed.

I would recommend you ignore boot up values and setup GLOBAL_CTRL*
the way you need. So I agree.
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