From: "Pan, Jacob jun" <jacob.jun.pan@intel.com>
To: "Eric W. Biederman" <ebiederm@xmission.com>
CC: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
       "H. Peter Anvin" <hpa@linux.intel.com>
Date: Mon, 29 Jun 2009 11:57:45 -0700
Subject: RE: [PATCH 9/9] x86/apic: support moorestown interrupt subsystem
Thread-Topic: [PATCH 9/9] x86/apic: support moorestown interrupt subsystem
Thread-Index: Acn2uFQRXFCwfxmPQJ+HsGofaweP3QCMWaJg
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>Yes, completely separate out the 8259.  I believe that complete
>separation will come for free if you move the ioapic earlier.
>
>What kind of PIC is native?
>

[[JPAN]] the emulated IOAPIC is for the south complex, and north complex 
has true PCI MSI capability so it does not need an ioapic. There is no native
hw interrupt controller, all interrupts are forwarded by the FW and delivered
 to local APIC via FSB writes (kind of).

The programming interface for the emulated ioapic is compatiable but there are 
are some special "features" such as no special/legacy entries such as cascade 
i8259, hpet legacy replacement routes (2,8), etc.

I will add a more detail introduction in the next version of this patch set.
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