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Date: Wed, 13 Mar 2002 08:40:26 -0800
From: "Martin J. Bligh" <Martin.Bligh@us.ibm.com>
Reply-To: "Martin J. Bligh" <Martin.Bligh@us.ibm.com>
To: Alan Cox <alan@lxorguk.ukuu.org.uk>,
        "Eric W. Biederman" <ebiederm@xmission.com>
cc: Andrea Arcangeli <andrea@suse.de>, Kurt Garloff <garloff@suse.de>,
        Linux kernel list <linux-kernel@vger.kernel.org>,
        "S. Chandra Sekharan" <sekharan@us.ibm.com>
Subject: Re: [PATCH] Support for assymmetric SMP
Message-ID: <467625960.1016008825@[10.10.2.3]>
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>> Actually I know of at least one dual P4 Xeon board where I 
>> haven't seen anything except IPI go to the second cpu.
> 
> Expect that to occur. The random distribution stuff doesn't seem to be a
> feature of all pentium IV systems. Ie this bug does want fixing

Dave Olien published a patch which will make this issue much
better for P4 - setting the TPR so we route interrupts according 
to how important the processors current work is. Should alleviate
the "dump everything on one CPU" P4ness.

Would still be nice to fix this though.

M.

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