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Date: Sat, 16 Mar 2002 12:53:29 -0700
From: yodaiken@fsmlabs.com
To: Linus Torvalds <torvalds@transmeta.com>
Cc: yodaiken@fsmlabs.com, Paul Mackerras <paulus@samba.org>,
        linux-kernel@vger.kernel.org
Subject: Re: [Lse-tech] Re: 10.31 second kernel compile
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In-Reply-To: <Pine.LNX.4.33.0203161102070.31913-100000@penguin.transmeta.com>; from torvalds@transmeta.com on Sat, Mar 16, 2002 at 11:16:16AM -0800
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On Sat, Mar 16, 2002 at 11:16:16AM -0800, Linus Torvalds wrote:
> Show me a semi-sane architecture that _matters_ from a commercial angle.

I thought we were into this for the pure technical thrill-)

> > is there a 64 bit machine with hardware search of pagetables? Even ibm
> > only has a hardware search of hash tables - which we agree are simply
> > a means of making your hardware TLB larger and slower.
> 
> ia64 does the same mistake, I think. 

I finally let myself read part of the hammer spec - and it's got that 4 level -
except for2MB pages where it is 3 level.  

			
 



> page tables. And I personally like how Hammer looks more than the ia64 VM 
> horror.

No kidding. But  I want TLB load instructions. 


-- 
---------------------------------------------------------
Victor Yodaiken 
Finite State Machine Labs: The RTLinux Company.
 www.fsmlabs.com  www.rtlinux.com

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