Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755105AbZI3Xl2 (ORCPT ); Wed, 30 Sep 2009 19:41:28 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755078AbZI3Xl1 (ORCPT ); Wed, 30 Sep 2009 19:41:27 -0400 Received: from mx1.chubb.wattle.id.au ([128.177.28.167]:36024 "EHLO mx1.chubb.wattle.id.au" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755058AbZI3Xl0 convert rfc822-to-8bit (ORCPT ); Wed, 30 Sep 2009 19:41:26 -0400 X-Greylist: delayed 2054 seconds by postgrey-1.27 at vger.kernel.org; Wed, 30 Sep 2009 19:41:26 EDT Date: Thu, 01 Oct 2009 09:06:33 +1000 Message-ID: <87hbukxcau.wl%peter@chubb.wattle.id.au> From: Peter Chubb To: "Luck, Tony" Cc: Christoph Lameter , Tejun Heo , Nick Piggin , "Yu, Fenghua" , linux-ia64 , Ingo Molnar , Rusty Russell , "linux-kernel@vger.kernel.org" Subject: Re: [PATCHSET percpu#for-next] percpu: convert ia64 to dynamic percpu and drop the old one, take#2 In-Reply-To: <57C9024A16AD2D4C97DC78E552063EA3E2F03FDC@orsmsx505.amr.corp.intel.com> References: <1253682382-24740-1-git-send-email-tj@kernel.org> <4AC153EA.2050007@suse.de> <57C9024A16AD2D4C97DC78E552063EA3E2F03E58@orsmsx505.amr.corp.intel.com> <57C9024A16AD2D4C97DC78E552063EA3E2F03FDC@orsmsx505.amr.corp.intel.com> User-Agent: Wanderlust/2.14.0 (Africa) SEMI/1.14.6 (Maruoka) FLIM/1.14.9 (=?ISO-8859-4?Q?Goj=F2?=) APEL/10.7 MULE XEmacs/21.4 (patch 21) (Educational Television) (i486-linux-gnu) X-Face: GgFg(Z>fx((4\32hvXq<)|jndSniCH~~$D)Ka:P@e@JR1P%Vr}EwUdfwf-4j\rUs#JR{'h# !]])6%Jh~b$VA|ALhnpPiHu[-x~@<"@Iv&|%R)Fq[[,(&Z'O)Q)xCqe1\M[F8#9l8~}#u$S$Rm`S9% \'T@`:&8>Sb*c5d'=eDYI&GF`+t[LfDH="MP5rwOO]w>ALi7'=QJHz&y&C&TE_3j! MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1433 Lines: 32 >>>>> "Tony" == Tony Luck writes: >> Tony: Could we use a global register for the per cpu address? That >> would make IA64 work similar to sparc. Tony> Would that be a useful trade of resources for convenience? Tony> We've already hard-wired r13 for "current". Grabbing another one Tony> would require fixing (since user code will have clobbered it). Tony> Possibly re-working any existing code that already uses whatever Tony> register you choose. r3, r4 and r5 are currently unused by the kernel, and unused by GCC and ICC. Only hand-written assembler and weird compilers use those registers(and my virtual-machine monitor :-(). If you wanted to experiment, that'd be a starting place. I'm not sure of the advantage though -- TLB mapping is relatively cheap, and we're no longer hard-wiring the translation register. You';d have to do somne careful benchmarking on a wide variety of workloads and machines to get a definitive answer. --- Dr Peter Chubb www.nicta.com.au peter DOT chubb AT nicta.com.au http://www.ertos.nicta.com.au ERTOS within National ICT Australia >From Imagination to Impact Imagining the (ICT) Future -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/