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Date: Wed, 20 Mar 2002 11:32:19 +0100
From: Martin Dalecki <dalecki@evision-ventures.com>
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To: Dan Hopper <ku4nf@austin.rr.com>
CC: Andre Hedrick <andre@linux-ide.org>, linux-kernel@vger.kernel.org
Subject: Re: Promise 20265 IDE chip gets detected in wrong order 2.4.x
In-Reply-To: <20020320045535.GA2242@yoda.dummynet> <Pine.LNX.4.10.10203192105490.525-100000@master.linux-ide.org> <20020320052336.GA2220@yoda.dummynet>
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Dan Hopper wrote:
> Andre Hedrick <andre@linux-ide.org> remarked:
> 
>>append="ide=reverse"
> 
> 
> You're right, this works, too, and is a lot easier to remember than
> the override I used before.  
> 
> 
>>Various Mainboard manufacturers do things to place the FAKE-RAID in front
>>of the the legacy south bridge.  This is classic Windows spoofing.
>>
>>
>>>PDC20265: IDE controller on PCI bus 00 dev 68
>>>VP_IDE: IDE controller on PCI bus 00 dev 89
>>
> 
> So, the I/O port assignments don't in fact properly determine the
> assignment order?  I'm gathering from what you're saying that the
> current behavior is related to PCI bus location?

Precisely: The PCI bus detection order matters.

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