Subject: Re: [PATCH 2/2] perf_events: add event constraints support for
 Intel processors
From: Peter Zijlstra <a.p.zijlstra@chello.nl>
To: Stephane Eranian <eranian@googlemail.com>
Cc: linux-kernel@vger.kernel.org, mingo@elte.hu, paulus@samba.org,
       perfmon2-devel@lists.sf.net, Stephane Eranian <eranian@gmail.com>
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	 <1254840129-6198-3-git-send-email-eranian@gmail.com>
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Date: Tue, 06 Oct 2009 18:29:04 +0200
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On Tue, 2009-10-06 at 16:42 +0200, Stephane Eranian wrote:

> 	This patch changes the event to counter assignment logic to take
> 	into account event constraints for Intel P6, Core and Nehalem
> 	processors. There is no contraints on Intel Atom. There are
> 	constraints on Intel Yonah (Core Duo) but they are not provided
> 	in this patch given that this processor is not yet supported by
> 	perf_events.

I don't think there's much missing for that, right?

I don't actually have that hardware, so I can't test it.

> 	As a result of the constraints, it is possible for some event groups
> 	to never actually be loaded onto the PMU if they contain two events
> 	which can only be measured on a single counter. That situation can be
> 	detected with the scaling information extracted with read().

Right, that's a pre existing bug in the x86 code (we can create groups
larger than the PMU) and should be fixed.

Patch looks nice though.


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