Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933649AbZKXRBt (ORCPT ); Tue, 24 Nov 2009 12:01:49 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S933331AbZKXRBs (ORCPT ); Tue, 24 Nov 2009 12:01:48 -0500 Received: from mx1.redhat.com ([209.132.183.28]:48168 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932505AbZKXRBr (ORCPT ); Tue, 24 Nov 2009 12:01:47 -0500 Message-ID: <4B0C1141.3070807@redhat.com> Date: Tue, 24 Nov 2009 12:00:49 -0500 From: Masami Hiramatsu User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.1.4pre) Gecko/20091014 Fedora/3.0-2.8.b4.fc11 Thunderbird/3.0b4 MIME-Version: 1.0 To: "H. Peter Anvin" CC: Frederic Weisbecker , Ingo Molnar , Ananth N Mavinakayanahalli , lkml , systemtap , DLE , Jim Keniston , Srikar Dronamraju , Christoph Hellwig , Steven Rostedt , Anders Kaseorg , Tim Abbott , Andi Kleen , Jason Baron , Mathieu Desnoyers Subject: Re: [PATCH -tip v5 07/10] kprobes/x86: Support kprobes jump optimization on x86 References: <20091123232115.22071.71558.stgit@dhcp-100-2-132.bos.redhat.com> <20091123232211.22071.58974.stgit@dhcp-100-2-132.bos.redhat.com> <4B0C0B50.6000907@zytor.com> In-Reply-To: <4B0C0B50.6000907@zytor.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2108 Lines: 60 Hi Peter, H. Peter Anvin wrote: > On 11/23/2009 03:22 PM, Masami Hiramatsu wrote: >> >> This uses stop_machine() for corss modifying code from int3 to jump. >> It doesn't allow us to modify code on NMI/SMI path. However, since >> kprobes itself doesn't support NMI/SMI code probing, it's not a >> problem. >> > > I'm a bit confused by the above statement... does that mean you're > poking int3 and *then* do stop_machine()? Yes, as I said in http://lkml.org/lkml/2009/11/24/310, there are two separated issues. ---- We have to separate below issues: - int3-based multi-bytes code replacement - multi-instruction replacement with int3-detour code The former is implemented on patch 9/10 and 10/10. As you can see, these patches are RFC status, because I'd like to wait for official reply of safeness from processor architects. And it may be able to use a dummy IPI for 2nd IPI because it just for waiting int3 interrupts. But again, it is just estimated that replacing with/recovering from int3 is automatically synchronized... However, at least stop_machine() method is officially described at "7.1.3 Handling Self- and Cross-Modifying Code" on the intel's software developer's manual 3A . So currently we can use it. For the latter issue, as I explained on previous reply, we need to wait all running interrupts including hardware interrupts. Thus I used synchronize_sched(). ---- So that the previous "x86 generic jump patching" patch is basically for single-instruction replacement. For multi-instructions replacement, we need to make detour code and wait for all running interruption. (of course, there are other static code limitations, as I described at "Safety check" section in patch 0/10.) Thank you, -- Masami Hiramatsu Software Engineer Hitachi Computer Products (America), Inc. Software Solutions Division e-mail: mhiramat@redhat.com -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/