Subject: Re: [PATCH] PCI: Always set prefetchable base/limit upper32
 registers
From: Alex Williamson <alex.williamson@hp.com>
To: Yinghai Lu <yinghai@kernel.org>
Cc: jbarnes@virtuousgeek.org, linux-pci@vger.kernel.org,
       linux-kernel@vger.kernel.org
In-Reply-To: <4B144346.50608@kernel.org>
References: <20091130212228.7555.43533.stgit@debian.lart>
	 <4B143AE5.7040702@kernel.org> <1259617381.8949.281.camel@8530w.home>
	 <4B143E83.6020105@kernel.org> <1259618496.8949.290.camel@8530w.home>
	 <4B144346.50608@kernel.org>
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Organization: HP OSLO R&D
Date: Mon, 30 Nov 2009 15:19:38 -0700
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On Mon, 2009-11-30 at 14:12 -0800, Yinghai Lu wrote:
> Alex Williamson wrote: 
> > I don't believe the PCI spec dictates whether the upper 32bit base
> > should be 0 or -1, so it's purely a BIOS initialization choice and Linux
> > should properly handle both.  If the hardware only supports 32bit
> > prefetchable windows, the hardware will drop the write, just as it did
> > for every 2.6 kernel before 1f82de10.  Thanks,
> 
> current code:
> 
> #define  PCI_PREF_RANGE_TYPE_MASK 0x0fUL
> #define  PCI_PREF_RANGE_TYPE_32 0x00     
> #define  PCI_PREF_RANGE_TYPE_64 0x01
> #define  PCI_PREF_RANGE_MASK    (~0x0fUL)
> 
> if the HW state the pref mmio is 64bit, we will touch upper 32bit. otherwise we will not touch it.

Really, where?  Please paste the code that writes to
PCI_PREF_BASE_UPPER32 in the case of hardware supporting a 64bit
prefetchable window.  I only see this happening if we are assigning it
to an IORESOURCE_MEM_64 resources.

Alex

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