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Date: Thu, 7 Dec 2000 19:47:47 +0100 (MET)
From: "Maciej W. Rozycki" <macro@ds2.pg.gda.pl>
To: Andi Kleen <ak@suse.de>
cc: richardj_moore@uk.ibm.com, linux-kernel@vger.kernel.org
Subject: Re: Why is double_fault serviced by a trap gate?
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Organization: Technical University of Gdansk
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On Thu, 7 Dec 2000, Andi Kleen wrote:

> Interesting. One of my ports references for PCs lists
> 
> 0044    r/w     PIT  counter 3 (PS/2, EISA)
>                 used as fail-safe timer. generates an NMI on time out.
>                 for user generated NMI see at 0462.

 Oh no, we don't use that.  Even though we could, it's rare -- it exists
for EISA systems only and then mostly older ones (i.e. non-PCI ones).

 In fact the only chipset that provides these additional NMI sources I
have docs for is the i82350 one. 

> I don't know if modern PCs still provide this counter, but if yes it could
> be used for a slow NMI watchdog that only runs every 30s or so. 

 An ability to choose a NMI frequency, especially such a low one, would be
desirable but it is really inexistent for most IA32 systems. 

-- 
+  Maciej W. Rozycki, Technical University of Gdansk, Poland   +
+--------------------------------------------------------------+
+        e-mail: macro@ds2.pg.gda.pl, PGP key available        +

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