Message-ID: <4B59DF4C.7040608@zytor.com>
Date: Fri, 22 Jan 2010 09:24:28 -0800
From: "H. Peter Anvin" <hpa@zytor.com>
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To: Borislav Petkov <bp@amd64.org>
CC: mingo@elte.hu, tglx@linutronix.de, andreas.herrmann3@amd.com,
       x86@kernel.org, linux-kernel@vger.kernel.org,
       Borislav Petkov <borislav.petkov@amd.com>
Subject: Re: [PATCH -v3 0/5] x86, cacheinfo, amd: L3 Cache Index Disable fixes
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On 01/22/2010 07:01 AM, Borislav Petkov wrote:
> these are a bunch of fixes which correct the disabling of L3 cache
> indexes. This is needed, for example, in the case when excessive
> correctable L3 error rates are observed. In a later step, this
> functionality will be connected to the mcheck mechanism and used to
> evaluate occurring L3 tag and data array errors and then disable the
> respective failing L3 cache regions in order to defer system failure
> before a sysop can intervene.
> 
> Those patches are also good -stable candidates.

Hmmm... I'm not sure I see a strong justification for a late -rc push
into Linus/stable push for for these... I think you would have to
explicitly make the case if you want them to be considered as such.

	-hpa

-- 
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel.  I don't speak on their behalf.

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