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Date: Sat, 30 Jan 2010 00:23:04 +0800
Message-ID: <d82e647a1001290823s1c651e4am113f843bef4ff9e2@mail.gmail.com>
Subject: Re: USB mass storage and ARM cache coherency
From: Ming Lei <tom.leiming@gmail.com>
To: Catalin Marinas <catalin.marinas@arm.com>
Cc: Matthew Dharm <mdharm-usb@one-eyed-alien.net>, linux-usb@vger.kernel.org,
       linux-kernel <linux-kernel@vger.kernel.org>
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2010/1/29 Catalin Marinas <catalin.marinas@arm.com>:
> Hi Matthew,
>
> I've been trying for some time to use a rootfs (ext2) on a USB memory
> stick on ARM platforms but without any success. The USB HCD driver is
> ISP1760 which doesn't use DMA.
>
> ARM has a Harvard cache architecture and what I get is incoherency
> between the I and D caches. The CPU I'm using (ARM11MPCore) has PIPT
> caches with D-cache lines allocation on write.
>
> Basically, when user space tries to execute from a new page, it faults
> and the data is requested via the VFS layer, SCSI block device and USB
> mass storage from the ISP1760 driver. The page is then mapped into user
> space and update_mmu_cache() called.
>
> However, since the driver is PIO, the data copied from the USB device
> into RAM gets stuck in the D-cache. On the above page requesting path
> there is no call to flush_dcache_page() to handle D-cache maintenance
> (for DMA drivers, that's handled by the DMA API).
>
> Since the USB mass storage code has the information about the USB driver

Sorry,  I am a little confused that usb mass storage has what information
about DMA or PIO of low level usb transfer?

Thanks,

-- 
Lei Ming
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