From: Oliver Neukum <oliver@neukum.org>
To: Catalin Marinas <catalin.marinas@arm.com>
Subject: Re: USB mass storage and ARM cache coherency
Date: Tue, 2 Feb 2010 13:07:56 +0100
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Cc: Matthew Dharm <mdharm-kernel@one-eyed-alien.net>,
       Sergei Shtylyov <sshtylyov@ru.mvista.com>,
       Ming Lei <tom.leiming@gmail.com>, linux-usb@vger.kernel.org,
       "linux-kernel" <linux-kernel@vger.kernel.org>,
       Sebastian Siewior <bigeasy@linutronix.de>, Greg KH <greg@kroah.com>
References: <20100129185434.GH19501@one-eyed-alien.net> <201002021248.10994.oliver@neukum.org> <1265112072.12634.53.camel@pc1117.cambridge.arm.com>
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Am Dienstag, 2. Februar 2010 13:01:12 schrieb Catalin Marinas:
> On Tue, 2010-02-02 at 11:48 +0000, Oliver Neukum wrote:
> > Am Montag, 1. Februar 2010 18:29:14 schrieb Catalin Marinas:
> > > +       if (usb_pipein(urb->pipe) && usb_pipetype(urb->pipe) == PIPE_BULK) {
> > > +               void *ptr;
> > > +               for (ptr = urb->transfer_buffer;
> > > +                    ptr < urb->transfer_buffer + urb->transfer_buffer_length;
> > > +                    ptr += PAGE_SIZE)
> > > +                       flush_dcache_page(virt_to_page(ptr));
> > 
> > Is it correct to limit this to BULK pipes?
> 
> I'm not entirely sure. The flush_dcache_page() should only be called for
> pages that may be mapped into user space (page cache pages). We don't
> need this for control buffers. It was my impression that what's coming
> from the mass storage layer intended for page cache pages has the
> PIPE_BULK type (I may be wrong though).

For storage that is correct. But what about other sources of pages,
for example iSCSI?

	Regards
		Oliver
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