Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755979Ab0BQUot (ORCPT ); Wed, 17 Feb 2010 15:44:49 -0500 Received: from caramon.arm.linux.org.uk ([78.32.30.218]:43652 "EHLO caramon.arm.linux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754094Ab0BQUor (ORCPT ); Wed, 17 Feb 2010 15:44:47 -0500 Date: Wed, 17 Feb 2010 20:44:04 +0000 From: Russell King - ARM Linux To: Benjamin Herrenschmidt Cc: Catalin Marinas , Oliver Neukum , "Shilimkar, Santosh" , Matthew Dharm , Ming Lei , "Mankad, Maulik Ojas" , Sergei Shtylyov , Sebastian Siewior , "linux-usb@vger.kernel.org" , linux-kernel , Pavel Machek , Greg KH , linux-arm-kernel Subject: Re: USB mass storage and ARM cache coherency Message-ID: <20100217204404.GD30033@n2100.arm.linux.org.uk> References: <20100208065519.GE1290@ucw.cz> <1265628483.4020.63.camel@pc1117.cambridge.arm.com> <201002160922.47072.oliver@neukum.org> <1266397543.16346.264.camel@pasglop> <1266420475.16707.31.camel@e102109-lin.cambridge.arm.com> <1266439020.16346.285.camel@pasglop> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1266439020.16346.285.camel@pasglop> User-Agent: Mutt/1.5.18 (2008-05-17) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1604 Lines: 38 On Thu, Feb 18, 2010 at 07:37:00AM +1100, Benjamin Herrenschmidt wrote: > On Wed, 2010-02-17 at 15:27 +0000, Catalin Marinas wrote: > > We do the same on ARM. The problem with most (all) HCD drivers that do > > PIO is that they copy the data to the transfer buffer but there is no > > call in this driver to flush_dcache_page(). The upper mass storage or > > filesystem layers don't call this function either, so there isn't > > anything that would set the PG_arch1 bit. > > Actually, clear it :-) > > I suppose that's one thing that needs to be fixed in the drivers. No, because that'd probably bugger up the Sparc64 method of delaying flush_dcache_page. This method works as follows: - a page cache page is allocated - this has PG_arch_1 clear. - IO happens on it and it's placed into the page cache. PG_arch_1 is still clear. - someone calls read()/write() which accesses the page. The generic file IO layers call flush_dcache_page() in response to read()/write() fs calls. flush_dcache_page() spots that the page is not yet mapped into userspace, and sets PG_arch_1 to mark the fact that the kernel mapping is dirty. - when someone maps the page, we check PG_arch_1 in update_mmu_cache. If PG_arch_1 is set, we flush the kernel mapping. Clearly, if we go around having drivers clearing PG_arch_1, this is going to break horribly. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/