Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id ; Sat, 20 Apr 2002 13:39:47 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id ; Sat, 20 Apr 2002 13:39:45 -0400 Received: from neon-gw-l3.transmeta.com ([63.209.4.196]:27921 "EHLO neon-gw.transmeta.com") by vger.kernel.org with ESMTP id ; Sat, 20 Apr 2002 13:39:32 -0400 Date: Sat, 20 Apr 2002 10:38:59 -0700 (PDT) From: Linus Torvalds To: Andrea Arcangeli cc: Brian Gerst , "H. Peter Anvin" , , , Subject: Re: [PATCH] Re: SSE related security hole In-Reply-To: <20020420192729.I1291@dualathlon.random> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 20 Apr 2002, Andrea Arcangeli wrote: > > Then the thing is different, I expected SSE3 not to mess the xmm layout. > If you just know SSE3 would break with the xorps the fxrestor way is > better. Anyways the problems I have about the implementation remains > (memset and duplicate efforts with ptrace in creating the empty fpu > state). Hey, send a clean patch and it will definitely get fixed.. I don't disagree with that part, although actual numbers are always good to have. > If they tell you the xmm registers won't change with SSE3 instead I > still prefer the xorps, that's 3bytes x 8 registers = 24 bytes of > icachce, compared to throwing away 512bytes/32 = 16 dcache cachelines so > it should be significantly faster. Oh, if they promise to not add registers we have an easy time, I agree. Linus - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/