Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751758Ab0FBFmh (ORCPT ); Wed, 2 Jun 2010 01:42:37 -0400 Received: from smtp.nokia.com ([192.100.122.233]:44879 "EHLO mgw-mx06.nokia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751169Ab0FBFmf (ORCPT ); Wed, 2 Jun 2010 01:42:35 -0400 Date: Wed, 2 Jun 2010 08:41:04 +0300 From: Felipe Balbi To: ext Thomas Gleixner Cc: Andrew Morton , "adharmap@codeaurora.org" , Mark Brown , Dmitry Torokhov , Trilok Soni , Pavel Machek , Brian Swetland , Joonyoung Shim , "m.szyprowski@samsung.com" , "t.fujak@samsung.com" , "kyungmin.park@samsung.com" , David Brownell , Daniel Ribeiro , "arve@android.com" , Barry Song <21cnbao@gmail.com>, Russell King , Bryan Huntsman , Iliyan Malchev , Michael Buesch , Bruno Premont , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: Re: [RFC PATCH] irq: handle private interrupt registration Message-ID: <20100602054104.GE6465@nokia.com> Reply-To: felipe.balbi@nokia.com References: <1274905794-7848-1-git-send-email-adharmap@codeaurora.org> <20100601152652.9296c5d0.akpm@linux-foundation.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii; format=flowed Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-06-14) X-OriginalArrivalTime: 02 Jun 2010 05:41:40.0045 (UTC) FILETIME=[46329FD0:01CB0216] X-Nokia-AV: Clean Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1336 Lines: 32 Hi, On Wed, Jun 02, 2010 at 01:14:32AM +0200, ext Thomas Gleixner wrote: >1) Use PER_CPU offsets for the irq numbers. The generic irq code does > not care whether the interrupt number is matching any physical > numbering scheme in the hardware, as long as the arch specific chip > implementation knows how to deal with it, which is not rocket > science to do. FWIW, I think (1) is a better approach as the problem will vanish altogether and to me it sounds like the simpler approach as well. Archs which have more than one IRQ chip (like OMAP with the twl4030 family) will already use sequencial numbering anyway, so using the same approach for N cpus, to me, sounds like a good deal. While at that, a question from my side: do we have a generic way of fetching the last IRQ number so we can easily use that to calculate the physical number of the IRQ line on the chip ? On OMAP, we have been passing that number down to twl4030 via platform_data, but it would be better to ask genirq to tell us which was the last irq number "claimed". -- balbi DefectiveByDesign.org -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/