Message-ID: <4C0EA9BD.1090306@zytor.com>
Date: Tue, 08 Jun 2010 13:36:13 -0700
From: "H. Peter Anvin" <hpa@zytor.com>
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To: "Eric W. Biederman" <ebiederm@xmission.com>
CC: jacob pan <jacob.jun.pan@linux.intel.com>, Alan Cox <alan@linux.intel.com>,
       Arjan van de Ven <arjan@linux.intel.com>,
       LKML <linux-kernel@vger.kernel.org>, Ingo Molnar <mingo@elte.hu>,
       Feng Tang <feng.tang@intel.com>, Len Brown <len.brown@intel.com>
Subject: Re: [PATCH] x86/sfi: fix ioapic gsi range
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On 06/08/2010 12:41 PM, Eric W. Biederman wrote:
> 
> At the ioapic and gsi level, and in your firmware interface reusing the
> numbers is fine.
> 
> The issue is what acpi calls bus 0 irqs, and how drivers deal with
> them.  We wind up having well know irqs:  irqs 3 and 4 for serial ports,
> irq 7 for parallel ports. irqs 14, and 15 for ide.
> 
> A bunch of these hardware devices we can get if someone connects up a
> lpc superio chip.
> 
> Even if sfi is never implemented on a platform where that kind of
> hardware exists, the current sfi code is setup to coexist
> simultaneously in the kernel with all of the infrastructure of other
> platforms where those kinds of devices exist.  Which means there can
> be drivers compiled into your kernel that make assumptions about special
> properties of the irqs 0-15.
> 
> I have seen a lot of weird hard to track issues, because of a conflict in
> assumptions over the ISA irqs.  It is easiest and safest just to let the
> first 16 linux irq numbers be reserved for the legacy oddness, so code can
> make assumptions and we don't have to worry about it.
> 
> As for the question about using legacy_pic to detect the absence of an irq
> controller that Peter raised.  We can't do that because it should be possible
> for an acpi system with all of the legacy hardware to exist without needing
> to implement an i8259, or ever run in the historical interrupt delivery mode
> of pcs.
> 
> With the current code you should get all of the remapping of the gsi's out
> of the legacy irq space without needing to lift a finger, and if someone later
> decides we need an irq override so we can have an isa irq present on a weird
> embedded system on a chip the code will be able to handle that easily.
> 

OK, let me ask this, then: if we do that, and we hardcode this as 16
magic IRQs indefinitely, does that mean we lose 16 IDT entries
indefinitely as well?  We are already shy on interrupt vectors, and that
would make me unhappy.

	-hpa
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