Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966837Ab0GSVdS (ORCPT ); Mon, 19 Jul 2010 17:33:18 -0400 Received: from mail-iw0-f174.google.com ([209.85.214.174]:63516 "EHLO mail-iw0-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965514Ab0GSVdR (ORCPT ); Mon, 19 Jul 2010 17:33:17 -0400 DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; b=uwkpoRwMbKWiFseRb6QEzrng83Iuw94v3hFGoj8v9etfCBevSZk/CqZpjgiqmCLV3U IjbbgU5E7i2Pz2VBNfkkDVXOJD7WDRQECRS2DL1K8mNXRwvL4VQsEiiOrdzyLVrWElAt 7tD7GzPs6VyCd7xFODYWxg0q7bXAi6mTchYFE= MIME-Version: 1.0 In-Reply-To: References: <4C37C365.6090508@gmail.com> Date: Mon, 19 Jul 2010 15:33:16 -0600 Message-ID: Subject: Re: Interrupt Affinity in SMP From: Robert Hancock To: Bryan Hundven Cc: linux-kernel@vger.kernel.org, mchehab@redhat.com Content-Type: text/plain; charset=ISO-8859-1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1849 Lines: 38 On Mon, Jul 19, 2010 at 2:03 PM, Bryan Hundven wrote: > On Mon, Jul 19, 2010 at 12:22 PM, Robert Hancock wrote: >> On Sat, Jul 17, 2010 at 2:02 PM, Bryan Hundven wrote: >>> Please see the two attached examples. >>> >>> Notice on the 5410 example how we start with the affinity set to 0xff, >>> and change it to 0xf0. >>> This should spread the interrupts over the last 4 cores of this quad >>> core - dual processor system. >>> >>> Also notice on the 5645 example, with the same commands we start with >>> 0xffffff and change to 0xfff000 to spread the interrupts over the last >>> 12 cores, but only the first of the last twelve cores receive >>> interrupts. >>> >>> This is the inconsistency I was trying to explain before. >> >> As I mentioned before, I believe the behavior in this case is chipset >> dependent, and potentially not something the kernel has control over. >> In most cases distributing the same interrupt across multiple cores is >> likely a bad idea in any case, unless the interrupt load is actually >> so high that a single CPU can't handle it. > > Can anyone confirm that this is how the 5520 and newer xeon chipsets > handle affinity? > > I might be totally wrong, but I thought that RSS (Receive Side > Scaling, which is available on the 82576 network card in that 5645 > xeon example) helps in that scenario? It looks like that card gives you multiple interrupt vectors that can be serviced independently by multiple CPUs. However, each interrupt vector is likely to only be handled by one CPU at a time. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/