Date: Thu, 26 Aug 2010 08:45:33 -0700
From: Stephen Hemminger <shemminger@vyatta.com>
To: Masayuki Ohtake <masa-korg@dsn.okisemi.com>
Cc: LKML <linux-kernel@vger.kernel.org>, ML netdev <netdev@vger.kernel.org>,
        Greg Rose <gregory.v.rose@intel.com>, Maxime Bizon <mbizon@freebox.fr>,
        Kristoffer Glembo <kristoffer@gaisler.com>,
        Ralf Baechle <ralf@linux-mips.org>, John Linn <john.linn@xilinx.com>,
        Randy Dunlap <randy.dunlap@oracle.com>,
        "David S. Miller" <davem@davemloft.net>, MeeGo <meego-dev@meego.com>,
        "Wang, Qi" <qi.wang@intel.com>, "Wang, Yong Y" <yong.y.wang@intel.com>,
        Andrew <andrew.chih.howe.khor@intel.com>,
        Intel OTC <joel.clark@intel.com>,
        "Foster, Margie" <margie.foster@intel.com>,
        Toshiharu Okada <okada533@dsn.okisemi.com>,
        Tomoya Morinaga <morinaga526@dsn.okisemi.com>,
        Takahiro Shimizu <shimizu394@dsn.okisemi.com>
Subject: Re: [PATCH] Gigabit Ethernet driver of Topcliff PCH
Message-ID: <20100826084533.1dfbd9bf@nehalam>
In-Reply-To: <4C763A67.5040107@dsn.okisemi.com>
References: <4C763A67.5040107@dsn.okisemi.com>
Organization: Vyatta
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> +/**
> + * pch_gbe_mac_init_rx_addrs - Initialize receive address's
> + * @hw:	Pointer to the HW structure
> + * @mar_count: Receive address registers
> + */
> +void pch_gbe_mac_init_rx_addrs(struct pch_gbe_hw *hw, u16 mar_count)
> +{
> +	u32 i;
> +	PCH_GBE_DEBUG("pch_gbe_mac_init_rx_addrs\n");
> +
> +	/* Setup the receive address */
> +	pch_gbe_mac_mar_set(hw, hw->mac.addr, 0);
> +
> +	/* Zero out the other receive addresses */
> +	for (i = 1; i < mar_count; i++) {
> +		iowrite32(0, &hw->reg->mac_adr[i].high);
> +		iowrite32(0, &hw->reg->mac_adr[i].low);
> +	}
> +	iowrite32(0xFFFE, &hw->reg->ADDR_MASK);
> +	/* wait busy */
> +	while ((ioread32(&hw->reg->ADDR_MASK) & PCH_GBE_BUSY))
> +		;
> +}

Use cpu_relax here to allow other hyper-thread to run.
	/* wait busy */
	while ((ioread32(&hw->reg->ADDR_MASK) & PCH_GBE_BUSY))
		cpu_relax();
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