Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753918Ab0H0Qdx (ORCPT ); Fri, 27 Aug 2010 12:33:53 -0400 Received: from wolverine02.qualcomm.com ([199.106.114.251]:41632 "EHLO wolverine02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752696Ab0H0Qdw (ORCPT ); Fri, 27 Aug 2010 12:33:52 -0400 X-IronPort-AV: E=McAfee;i="5400,1158,6086"; a="52340982" Subject: Re: [PATCH 03/24] arm: mm: add proc info for ScorpionMP From: Daniel Walker To: Catalin Marinas Cc: Jeff Ohlstein , Russell King , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tony Lindgren , "Kirill A. Shutemov" In-Reply-To: <1282925072.26355.61.camel@e102109-lin.cambridge.arm.com> References: <1282922978.5075.13.camel@m0nster> <1282925072.26355.61.camel@e102109-lin.cambridge.arm.com> Content-Type: text/plain; charset="UTF-8" Date: Fri, 27 Aug 2010 09:33:46 -0700 Message-ID: <1282926826.5075.21.camel@m0nster> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 2534 Lines: 61 On Fri, 2010-08-27 at 17:04 +0100, Catalin Marinas wrote: > On Fri, 2010-08-27 at 16:29 +0100, Daniel Walker wrote: > > On Fri, 2010-08-27 at 14:54 +0100, Catalin Marinas wrote: > > > On Wed, 2010-08-25 at 05:57 +0100, Jeff Ohlstein wrote: > > > > From: Daniel Walker > > > > > > > > ScorpionMP does not have the SMP/nAMP and TLB ops broadcasting bits in > > > > ACTLR. > > > > > > > > Signed-off-by: Daniel Walker > > > > Signed-off-by: Jeff Ohlstein > > > > --- > > > > arch/arm/mm/proc-v7.S | 24 ++++++++++++++++++++++++ > > > > 1 files changed, 24 insertions(+), 0 deletions(-) > > > > > > > > diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S > > > > index 7aaf88a..98fd7e5 100644 > > > > --- a/arch/arm/mm/proc-v7.S > > > > +++ b/arch/arm/mm/proc-v7.S > > > > @@ -196,6 +196,7 @@ __v7_setup: > > > > orreq r0, r0, #(1 << 6) | (1 << 0) @ Enable SMP/nAMP mode and > > > > mcreq p15, 0, r0, c1, c0, 1 @ TLB ops broadcasting > > > > #endif > > > > +__v7_msm_setup: > > > > adr r12, __v7_setup_stack @ the local stack > > > > stmia r12, {r0-r5, r7, r9, r11, lr} > > > > bl v7_flush_dcache_all > > > > > > It may be better to move the generic __v7_setup here and have a specific > > > entry for ARM Ltd cores (mask 0xff0f0000 and value 0x410f0000). > > > > I'm not sure I follow you.. Are you saying there are other cpu's that > > don't need the SMP stuff at the top of __v7_setup ? > > The SMP/nAMP bit is something specific to the ARM11MPCore and Cortex-A9 > processors produced by ARM. If you core doesn't need this, it should use > a default __v7_setup without any additional bits being set. > > I'm not aware of other MP ARM processors produced by other companies > that would require exactly the same bit being set. So your saying it makes more sense to change the msm entry into the default entry, and make the current default into the ARM11MPCore/Cortex-A9 entry? There's 4 or 5 other cpu's that have SMP but none have had to jump over those bits AFAIK .. Daniel -- Sent by an consultant of the Qualcomm Innovation Center, Inc. The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/