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References: <1281956870-12463-1-git-send-email-s.hauer@pengutronix.de>
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Date: Sun, 29 Aug 2010 14:35:01 +0200
Message-ID: <AANLkTimhFAhR3sSJWo3b8_rMk5GCQfOwG0T36uEs=DjA@mail.gmail.com>
Subject: Re: [PATCH 3/3 v2] dmaengine: Add Freescale i.MX SDMA support
From: Linus Walleij <linus.ml.walleij@gmail.com>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Marek Vasut <marek.vasut@gmail.com>, linux-arm-kernel@lists.infradead.org,
        Dan Williams <dan.j.williams@intel.com>, linux-kernel@vger.kernel.org,
        =?ISO-8859-1?Q?Uwe_Kleine=2DK=F6nig?= 
	<u.kleine-koenig@pengutronix.de>
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2010/8/28 Sascha Hauer <s.hauer@pengutronix.de>:

> Peripherals integrated into a SoC like the SDMA engine here are
> normally accessible in native endianess and thus need the __raw_*
> functions.

So the SDMA actually switch and twist around the endianness of
its registers if it's synthesized into a bigendian version of the system?

Or hardware-dynamically even depending on the setting of the
endianness bit in the ARM core?

How can that possibly even work...

But I'm still impressed by the statemachines some silicon
engineers come up with so wouldn't surprise me. X-)
I understand the code now atleast. Our hardware is always
synthesized LE so we so handily use [read|write][b|w|l]
everywhere, luckily.

Yours,
Linus Walleij
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