Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755096Ab0H3M4F (ORCPT ); Mon, 30 Aug 2010 08:56:05 -0400 Received: from metis.ext.pengutronix.de ([92.198.50.35]:38456 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752714Ab0H3M4D (ORCPT ); Mon, 30 Aug 2010 08:56:03 -0400 Date: Mon, 30 Aug 2010 14:55:56 +0200 From: Sascha Hauer To: Linus Walleij Cc: Marek Vasut , linux-arm-kernel@lists.infradead.org, Dan Williams , linux-kernel@vger.kernel.org, Uwe =?iso-8859-15?Q?Kleine-K=F6nig?= Subject: Re: [PATCH 3/3 v2] dmaengine: Add Freescale i.MX SDMA support Message-ID: <20100830125556.GL1473@pengutronix.de> References: <1281956870-12463-1-git-send-email-s.hauer@pengutronix.de> <20100823174852.GB26928@pengutronix.de> <201008281727.10913.marek.vasut@gmail.com> <20100828161858.GI1473@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Sent-From: Pengutronix Hildesheim X-URL: http://www.pengutronix.de/ X-IRC: #ptxdist @freenode X-Accept-Language: de,en X-Accept-Content-Type: text/plain X-Uptime: 14:45:20 up 58 days, 3:56, 31 users, load average: 0.21, 0.30, 0.34 User-Agent: Mutt/1.5.18 (2008-05-17) X-SA-Exim-Connect-IP: 2001:6f8:1178:2:215:17ff:fe12:23b0 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1280 Lines: 29 On Sun, Aug 29, 2010 at 02:35:01PM +0200, Linus Walleij wrote: > 2010/8/28 Sascha Hauer : > > > Peripherals integrated into a SoC like the SDMA engine here are > > normally accessible in native endianess and thus need the __raw_* > > functions. > > So the SDMA actually switch and twist around the endianness of > its registers if it's synthesized into a bigendian version of the system? > > Or hardware-dynamically even depending on the setting of the > endianness bit in the ARM core? I think it's the bus between the ARM core and the periherals which changes the endianess. I have never tried running an i.MX in big endian mode, so I can only guess how the system really behaves in BE mode. Sascha -- Pengutronix e.K. | | Industrial Linux Solutions | http://www.pengutronix.de/ | Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 | -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/