From: Andi Kleen <andi@firstfloor.org>
To: Kees Cook <kees.cook@canonical.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/4] x86: clear XD_DISABLED flag on Intel to regain NX
References: <20101109181157.GE5876@outflux.net>
	<20101109181501.GG5876@outflux.net>
Date: Wed, 10 Nov 2010 17:11:55 +0100
In-Reply-To: <20101109181501.GG5876@outflux.net> (Kees Cook's message of "Tue,
	9 Nov 2010 10:15:01 -0800")
Message-ID: <87hbfpp390.fsf@basil.nowhere.org>
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Kees Cook <kees.cook@canonical.com> writes:
> +
> +verify_cpu_clear_xd:
> +	movl	$MSR_IA32_MISC_ENABLE, %ecx
> +	rdmsr
> +	btrl	$2, %edx		# clear MSR_IA32_MISC_ENABLE_XD_DISABLE
> +	jnc	verify_cpu_check	# only write MSR if bit was
> changed

Strictly it's still a bit dangerous to read this MSR without knowing
about the CPU for sure. If you guess wrong you'll die here.

I would rather move this code later into the early init code (before the
second mapping is set up, which is still in time). There the exception
handlers are up and you could handle a #GP if it happens.

-Andi

-- 
ak@linux.intel.com -- Speaking for myself only.
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