Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932558Ab0KLSD6 (ORCPT ); Fri, 12 Nov 2010 13:03:58 -0500 Received: from cam-admin0.cambridge.arm.com ([217.140.96.50]:50898 "EHLO cam-admin0.cambridge.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756541Ab0KLSBE (ORCPT ); Fri, 12 Nov 2010 13:01:04 -0500 From: Catalin Marinas To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 20/20] ARM: LPAE: Add the Kconfig entries Date: Fri, 12 Nov 2010 18:00:40 +0000 Message-Id: <1289584840-18097-21-git-send-email-catalin.marinas@arm.com> X-Mailer: git-send-email 1.7.3.2.164.g6f10c In-Reply-To: <1289584840-18097-1-git-send-email-catalin.marinas@arm.com> References: <1289584840-18097-1-git-send-email-catalin.marinas@arm.com> X-OriginalArrivalTime: 12 Nov 2010 18:00:55.0641 (UTC) FILETIME=[8D86B490:01CB8293] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1881 Lines: 51 This patch adds the ARM_LPAE and ARCH_PHYS_ADDR_T_64BIT Kconfig entries allowing LPAE support to be compiled into the kernel. Signed-off-by: Catalin Marinas --- arch/arm/Kconfig | 2 +- arch/arm/mm/Kconfig | 13 +++++++++++++ 2 files changed, 14 insertions(+), 1 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index f35fe82..e376b7b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1599,7 +1599,7 @@ config CMDLINE_FORCE config XIP_KERNEL bool "Kernel Execute-In-Place from ROM" - depends on !ZBOOT_ROM + depends on !ZBOOT_ROM && !ARM_LPAE help Execute-In-Place allows the kernel to run from non-volatile storage directly addressable by the CPU, such as NOR flash. This saves RAM diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 8493ed0..3ca2d15 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -615,6 +615,19 @@ config IO_36 comment "Processor Features" +config ARM_LPAE + bool "Support for the Large Physical Address Extension" + depends on MMU && CPU_V7 + help + Say Y if you have an ARMv7 processor supporting the LPAE page table + format and you would like access memory beyond the 4GB limit. + +config ARCH_PHYS_ADDR_T_64BIT + def_bool ARM_LPAE + +config ARCH_DMA_ADDR_T_64BIT + def_bool ARM_LPAE + config ARM_THUMB bool "Support Thumb user binaries" depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_V6 || CPU_V7 || CPU_FEROCEON -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/