Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756247Ab0KSSht (ORCPT ); Fri, 19 Nov 2010 13:37:49 -0500 Received: from wolverine01.qualcomm.com ([199.106.114.254]:21385 "EHLO wolverine01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756044Ab0KSShr (ORCPT ); Fri, 19 Nov 2010 13:37:47 -0500 X-IronPort-AV: E=McAfee;i="5400,1158,6172"; a="63575061" Date: Fri, 19 Nov 2010 10:37:45 -0800 (PST) From: Gregory Bean X-X-Sender: gbean@gbean-linux.qualcomm.com To: Janakiram Sistla cc: Gregory Bean , dwalker@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 2/2] msm: gpio: Add irq support to v2 gpiolib. In-Reply-To: Message-ID: References: <1290109970-26752-1-git-send-email-gbean@codeaurora.org> <1290109970-26752-2-git-send-email-gbean@codeaurora.org> User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 679 Lines: 19 On Thu, 18 Nov 2010, Janakiram Sistla wrote: >> Targets with the v2 block define CONFIG_MSM_V2_TLMM. > > So in that case we can name it as gpio-tlmm.c ?? No, not and have things be any clearer. All MSM chips have a TLMM block. The older chips have version 1 (v1) of the TLMM block. The newer chips have v2. -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum. -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/