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Date: Mon, 10 Jun 2002 23:38:50 -0700 (PDT)
Message-Id: <20020610.233850.60926092.davem@redhat.com>
To: oliver@neukum.name
Cc: roland@topspin.com, wjhun@ayrnetworks.com, paulus@samba.org,
        linux-kernel@vger.kernel.org
Subject: Re: PCI DMA to small buffers on cache-incoherent arch
From: "David S. Miller" <davem@redhat.com>
In-Reply-To: <200206110823.52065.oliver@neukum.name>
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   From: Oliver Neukum <oliver@neukum.name>
   Date: Tue, 11 Jun 2002 08:23:52 +0200
   
   That would mean doing things like memory allocations for one single
   byte. Also it would affect things like the scsi layer (sense buffer in
   the structure).
   And it would be additional overhead for everybody for the benefit
   of a small minority. An alignment macro could be turned into a nop
   on some architectures.

The problem is people are going to get it wrong if we expose all of
this cacheline crap to the drivers.
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