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Date: Tue, 11 Jun 2002 00:43:05 -0700 (PDT)
Message-Id: <20020611.004305.96601553.davem@redhat.com>
To: oliver@neukum.name
Cc: roland@topspin.com, wjhun@ayrnetworks.com, paulus@samba.org,
        linux-kernel@vger.kernel.org
Subject: Re: PCI DMA to small buffers on cache-incoherent arch
From: "David S. Miller" <davem@redhat.com>
In-Reply-To: <20020611.003625.05877183.davem@redhat.com>
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   From: "David S. Miller" <davem@redhat.com>
   Date: Tue, 11 Jun 2002 00:36:25 -0700 (PDT)

   The DMA_ALIGN attribute doesn't work, on some systems the PCI
   cacheline size is determined at boot time not compile time.

Another note, it could be per-PCI controller what this cacheline size
is.  We'll need to pass in a pdev to the alignment interfaces to
do this correctly.

So none of this can be done at compile time folks.
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