Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id ; Wed, 12 Jun 2002 05:43:25 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id ; Wed, 12 Jun 2002 05:43:24 -0400 Received: from s2.relay.oleane.net ([195.25.12.49]:59401 "HELO s2.relay.oleane.net") by vger.kernel.org with SMTP id ; Wed, 12 Jun 2002 05:43:23 -0400 From: Benjamin Herrenschmidt To: "David S. Miller" , Cc: Subject: Re: PCI DMA to small buffers on cache-incoherent arch Date: Tue, 11 Jun 2002 19:33:47 +0200 Message-Id: <20020611173347.21348@smtp.adsl.oleane.com> In-Reply-To: <20020611.202553.28822742.davem@redhat.com> X-Mailer: CTM PowerMail 3.1.2 F MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org >Remember please that specifically the DMA mapping APIs encourage use >of consistent memory for small data objects. It is specifically >because non-consistent DMA accesses to small bits are going to be very >slow (ie. the PCI controller is going to prefetch further cache lines >for no reason, for example). The non-consistent end of the APIs is >meant for long contiguous buffers, not small chunks. > >This is one of the reasons I want to fix this by making people use >either consistent memory or PCI pools (which is consistent memory >too). Please don't limit the API design to PCI ;) There are more and more embedded CPUs out there with their own bunch of on-chip devices that are neither consistent nor PCI based, their drivers will have the exact same problem to deal with though. Ben. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/