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Date: Fri, 14 Jun 2002 06:27:54 +0200
From: Andi Kleen <ak@suse.de>
To: Benjamin LaHaise <bcrl@redhat.com>
Cc: Andrea Arcangeli <andrea@suse.de>, Andi Kleen <ak@suse.de>,
        linux-kernel@vger.kernel.org,
        Richard Brunner <richard.brunner@amd.com>, mark.langsdorf@amd.com
Subject: Re: New version of pageattr caching conflict fix for 2.4
Message-ID: <20020614062754.A11232@wotan.suse.de>
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On Fri, Jun 14, 2002 at 12:17:26AM -0400, Benjamin LaHaise wrote:
> On Fri, Jun 14, 2002 at 06:00:25AM +0200, Andrea Arcangeli wrote:
> > just a fast comment on this bit: x86 specs state invlpg must flush
> > global entries from the tlb too, see also the kmap_prot as pratical
> > reference.
> 
> It's not the 4KB pages that I'm worried about so much as the 4MB pages.

Both AMD x86-64 and Intel IA32 documentation states that INVLPG flushes global
TLBs. The first version of change_page_attr did in fact use __flush_tlb_all,
but I changed it after checking the docs.

-Andi
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